We proudly present a white paper written by Integra's Daniel Koyama, Apet Barsegyan, and John Walker, describing the implications of using kW-level GaN transistors in radar and avionic systems.

This paper examines the effect of using normal Class A/B bias for kW-level GaN and LDMOS transistors used in radar and avionic systems. It is shown that Class A/B bias results in an overall efficiency which is typically 5-10% less than the efficiency during the pulse as well as generating significant shot noise in the off period which can cause receiver de-sensitization.

A novel automatic gate pulsing and sequencing circuit is described which overcomes both of the above problems. Rise/fall time and latency measurements are presented for this circuit. It is shown that the output noise in the off period is reduced by >30dB. Measurements are presented that show this circuit has typically 100ns and 16ns rise and fall times, respectively, with a pulse latency of 10ns.

Using this circuit, the efficiency over all time is typically just 0.4% less than the intrinsic transistor efficiency during the pulse for a 1kW transistor (the gate pulsing circuit consumes 30dB and a method of providing temperature compensation is discussed).

Download the full white paper "Implications of Using kW-level GaN Transistors in Radar and Avionic Systems" and contact our support team with questions regarding your radar system.